In the integrated circuits, a diffused layer is widely employed in forming a resistor. The resistor in the form of a diffused layer is a conductor layer that results from migrating impurities, through a diffusion process, into a semiconductor substrate. Parasitic capacitance at a p-n junction between the diffused layered resistor and the substrate hinders high-speed operation expected in the integrated circuits. Thus, in the high performance integrated circuits, a thin resistor film, such as, a polysilicon film, is widely used. An insulator film exists between the thin resistor film and the substrate, providing less parasitic capacitance than the diffused layer does. However, the parasitic capacitance still existing with respect to the substrate induces parasitic impedance. Thus, during operation within high frequency range, the integrated circuit may malfunction due to variation of impedance of elements.
JP-A 7-122710 discloses an integrated circuit structure in which a cavity is disposed between a resistor and a substrate for reduced parasitic capacitance. This known structure is explained in connection with FIGS. 10A to 14B.
As shown in FIGS. 10A and 10B, an insulator film 302 (approximately 500 nanometers in thickness) is formed on a semiconductor substrate 301 by deposition or oxidation. A resistive element of resistor film 313 is formed by patterning after depositing a film of an inorganic material such as polycrystalline silicon (polysilicon) or W--Si--N on the insulator film 302. Subsequently, a resist is used as a mask to protect the resistive element 313. The insulator film 302 is partially removed by etching to form grooves 309 on one and the opposite sides of the resistive element 313 as shown in FIGS. 11A and 11B. Subsequently, as shown in FIG. 12, the surface of the substrate 301 is coated with an insulator film 321 (approximately 200 nanometers in thickness). Specifically, the insulator film 321 coats the insulator film 302 and the resistive element 313. Using a resist, as a mask, not shown, the insulator film 302 is partially etched away to open windows 309a that align with the grooves 309, respectively, as shown in FIG. 13. Admitting solvent for etching into the grooves 309 through the windows 309a, the substrate 301 is etched to remove portions that are located below the resistive element 313 to form cavities 311, as shown in FIGS. 14A and 14B. These Figures show the transient state in which the etching is suspended while the cavities 311 are still isolated. If the etching develops deeper in depth, the cavities 311 will grow into a single cavity.
The etching does not end automatically, making it necessary to specify time for etching. For increased reduction in parasitic capacitance, it is desired to form a single cavity under the resistive element. In the process, not only a portion of the substrate under the resistive but also the adjacent portions thereof are etched away. As a result, a cavity with overabundance of volume is formed under and in the vicinity of the resistive element. This attributes mainly to elongated time required for removing the portion of the substrate under the resistive element.
This known etch technique requires formation of grooves on one and the opposite sides of a resistive element for admission of solvent for etching. This makes it difficult to accomplish circuit integration as expected in the integrated circuits. Besides, since the volume of the cavity is overabundance, the resistive element region becomes structurally weak so that it may be recessed or peeled off due to stress imparted thereto.
An object of the present invention is to increase structural strength of an integrated circuit of the kind having a cavity under a conductor film, which serves as a passive element or an interconnection, without hindering circuit integration.